With the development of semiconductor technologies, metal-oxide-semiconductor field-effect-transistors (MOSFET) have gained wide applications. In the recent years, microelectronics technologies around silicon integrated circuits have been rapidly developed. The degree of integration for semiconductor chips basically follows Moore's law, i.e., it increases by doubling every 18 months. As the degree of integration of semiconductor chips continually increases, however, MOSFET channel length becomes shorter and shorter. When the MOSFET channel length becomes very short, short-channel effect can degrade the performance of semiconductor chips, causing them to even malfunction.
As the feature sizes of MOSFET devices continue to shrink, source/drain junction depths need to be more and more shallow in order to suppress the short-channel effect. The more and more shallow source/drain junction depths, however, together with limitations on dopant solid solubility, result in MOSFET source/drain parasitic resistance to become greater and greater, placing more and more demand on source/drain metal silicide (small-scale MOSFET typically use nickel silicide). Nickel silicide at the source/drain regions is usually formed by deposited nickel (Ni) reacting with silicon during annealing. It not only has relatively low resistivity and contact resistance, but is also compatible with common silicon processing technologies. Nowadays, self-aligned nickel silicide processes are key processes for making CMOS integrated circuits. Advancement in processing technologies requires that the silicide be thinner and thinner, sometimes even below 10 nm, its surface should have good thermal stability, without appearance of agglomeration, its resistivity be kept at a relatively small value, and there be little lateral growth. These requirements pose various challenges for the metallization processes at source/drain regions of nano-scale devices.
Schottky junction metal silicide sources and drains have become research hotspots recently, for the purpose of using Schottky junction metal silicide sources and drains to replace conventional heavily doped P-N junction sources and drains for super-miniaturized CMOS devices in the future. The main advantages of metal silicide source/drain are its low parasitic resistance and capacitance, good scale down characteristics, easy fabrication processes, low thermal budget, anti-latch-up effect and floating-body effect in silicon-on-insulator (SOI) substrate. Because Schottky junction metal silicide source/drain has low resistance characteristics and steep atomic layer level interface between the silicide and silicon, Schottky-barrier MOSFET devices are expected to scale down to 10 nm and below.
FIG. 1 is a structural diagram of a conventional Schottky metal silicide source/drain transistor, which includes a substrate 100, gate electrode stack 110, sidewalls 121 and 122, source Schottky junction 131 and drain Schottky junction 132. Gate stack 110 is disposed on the substrate 100, sidewalls 121 and 122 are disposed on two sides of the gate stack 110, source Schottky junction 131 and drain Schottky junction 132 are set in the substrate 100 on two sides of the sidewalls 121 and 122, forming the source and drain of the transistor. Source Schottky junction 131 and drain Schottky junction 132 are typically composed of nickel silicide or the like, and formed using self-aligned processes. In the so-called self-aligned processes, a layer of metal is first formed to cover the surfaces of the source/drain regions, and annealing is used to form metal silicides at the source and drain regions.
The above structure has the following shortcomings. During the self-aligned processes to form nickel silicides at the source/drain regions of the MOSFET, because nickel basically does not react with the sidewalls 121 and 122, in addition to the nickel on the surfaces of the substrate 100 at the source/drain regions diffusing into the substrate 100 and forming nickel silicides, the nickel covering the sidewalls 121 and 122 may also diffuse toward the substrate 100. After the nickel on the surfaces of the substrate 100 at the source and drain regions has been converted into nickel silicides, the nickel on the sidewalls 121 and 122 may continue to diffuse toward the source/drain regions of the silicon substrate. This leads to the formed nickel silicide to have uncontrollable and non-uniform thickness, and excessive lateral growth under the gate electrode 110, resulting in shortened channel length, reduced transistor threshold voltage, and increased leakage current.
Therefore, how to form a nickel silicide layer with a ultra-thin and uniform vertical dimension, and controllable and suppressed lateral growth, is a key challenge for the future P-N junction source/drain or Schottky junction source/drain MOSFET fabrication processes.